Line data Source code
1 : /******************************************************************************************************
2 :
3 : (C) 2022-2025 IVAS codec Public Collaboration with portions copyright Dolby International AB, Ericsson AB,
4 : Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Huawei Technologies Co. LTD.,
5 : Koninklijke Philips N.V., Nippon Telegraph and Telephone Corporation, Nokia Technologies Oy, Orange,
6 : Panasonic Holdings Corporation, Qualcomm Technologies, Inc., VoiceAge Corporation, and other
7 : contributors to this repository. All Rights Reserved.
8 :
9 : This software is protected by copyright law and by international treaties.
10 : The IVAS codec Public Collaboration consisting of Dolby International AB, Ericsson AB,
11 : Fraunhofer-Gesellschaft zur Foerderung der angewandten Forschung e.V., Huawei Technologies Co. LTD.,
12 : Koninklijke Philips N.V., Nippon Telegraph and Telephone Corporation, Nokia Technologies Oy, Orange,
13 : Panasonic Holdings Corporation, Qualcomm Technologies, Inc., VoiceAge Corporation, and other
14 : contributors to this repository retain full ownership rights in their respective contributions in
15 : the software. This notice grants no license of any kind, including but not limited to patent
16 : license, nor is any license granted by implication, estoppel or otherwise.
17 :
18 : Contributors are required to enter into the IVAS codec Public Collaboration agreement before making
19 : contributions.
20 :
21 : This software is provided "AS IS", without any express or implied warranties. The software is in the
22 : development stage. It is intended exclusively for experts who have experience with such software and
23 : solely for the purpose of inspection. All implied warranties of non-infringement, merchantability
24 : and fitness for a particular purpose are hereby disclaimed and excluded.
25 :
26 : Any dispute, controversy or claim arising under or in relation to providing this software shall be
27 : submitted to and settled by the final, binding jurisdiction of the courts of Munich, Germany in
28 : accordance with the laws of the Federal Republic of Germany excluding its conflict of law rules and
29 : the United Nations Convention on Contracts on the International Sales of Goods.
30 :
31 : *******************************************************************************************************/
32 :
33 : /*====================================================================================
34 : EVS Codec 3GPP TS26.443 Nov 04, 2021. Version 12.14.0 / 13.10.0 / 14.6.0 / 15.4.0 / 16.3.0
35 : ====================================================================================*/
36 :
37 : #include <stdint.h>
38 : #include "options.h"
39 : #ifdef DEBUGGING
40 : #include "debug.h"
41 : #endif
42 : #include <math.h>
43 : #include "cnst.h"
44 : #include "rom_enc.h"
45 : #include "rom_com.h"
46 : #include "prot.h"
47 : #include "wmc_auto.h"
48 :
49 : /*---------------------------------------------------------------------*
50 : * core_switching_pre_enc()
51 : *
52 : * Preprocessing (preparing) for ACELP/HQ core switching
53 : *---------------------------------------------------------------------*/
54 :
55 1131664 : void core_switching_pre_enc(
56 : Encoder_State *st, /* i/o: encoder state structure */
57 : const float *old_inp_12k8, /* i : old input signal @12.8kHz */
58 : const float *old_inp_16k, /* i : old input signal @16kHz */
59 : const int16_t active_cnt, /* i : active frame counter */
60 : const int16_t last_element_mode /* i : last_element_mode */
61 : )
62 : {
63 : int16_t Sample_Delay_HP, Sample_Delay_LP;
64 :
65 1131664 : HQ_ENC_HANDLE hHQ_core = st->hHQ_core;
66 1131664 : LPD_state_HANDLE hLPDmem = st->hLPDmem;
67 :
68 : /* Codec mode switching */
69 1131664 : if ( st->last_codec_mode == MODE2 || ( ( st->last_core == TCX_20_CORE || st->last_core == TCX_10_CORE ) && st->element_mode > EVS_MONO ) )
70 : {
71 947004 : if ( hLPDmem != NULL )
72 : {
73 242159 : mvr2r( hLPDmem->mem_syn2, hLPDmem->mem_syn1, M );
74 : }
75 :
76 947004 : if ( st->element_mode != IVAS_CPE_MDCT )
77 : {
78 242159 : st->igf = 0;
79 : }
80 :
81 947004 : if ( st->hBWE_TD != NULL )
82 : {
83 242159 : if ( st->last_core != ACELP_CORE )
84 : {
85 242151 : set_f( st->hBWE_TD->old_bwe_exc, 0, PIT16k_MAX * 2 );
86 242151 : st->hBWE_TD->bwe_non_lin_prev_scale = 0.0f;
87 : }
88 :
89 242159 : set_f( st->hBWE_FD->old_syn_12k8_16k, 0, NS2SA( 16000, DELAY_FD_BWE_ENC_NS ) );
90 : }
91 :
92 947004 : if ( st->last_core == TCX_20_CORE || st->last_core == TCX_10_CORE )
93 : {
94 946996 : if ( st->element_mode == EVS_MONO )
95 : {
96 30 : st->last_core = HQ_CORE;
97 : }
98 :
99 946996 : if ( hHQ_core != NULL )
100 : {
101 248890 : set_f( hHQ_core->last_ni_gain, 0, BANDS_MAX );
102 248890 : set_f( hHQ_core->last_env, 0, BANDS_MAX );
103 248890 : hHQ_core->last_max_pos_pulse = 0;
104 :
105 248890 : hHQ_core->mode_count = 0;
106 248890 : hHQ_core->mode_count1 = 0;
107 :
108 248890 : set_s( hHQ_core->prev_SWB_peak_pos, 0, SPT_SHORTEN_SBNUM );
109 248890 : hHQ_core->prev_frm_hfe2 = 0;
110 248890 : hHQ_core->prev_stab_hfe2 = 0;
111 : }
112 :
113 : /*ALDO overlap windowed past: also used in MODE2 but for other MDCT-LB*/
114 946996 : if ( st->element_mode == EVS_MONO && st->hTcxEnc != NULL )
115 : {
116 30 : set_f( st->hTcxEnc->old_out, 0, L_FRAME32k );
117 : }
118 : }
119 947004 : if ( st->L_frame == L_FRAME16k && st->last_L_frame == L_FRAME )
120 : {
121 244 : mvr2r( st->lsp_old, st->lsp_old16k, M );
122 244 : st->rate_switching_reset_16kHz = lsp_convert_poly( st->lsp_old16k, L_FRAME16k, 0 );
123 : }
124 :
125 947004 : st->use_acelp_preq = 0;
126 : }
127 :
128 1131664 : if ( st->last_core == -1 && ( st->core == HQ_CORE || st->core == TCX_20_CORE || st->core == TCX_10_CORE ) )
129 : {
130 : /* very first frame is HQ_CORE */
131 0 : st->last_core = HQ_CORE;
132 : }
133 :
134 1131664 : if ( st->core == HQ_CORE && ( st->last_core == ACELP_CORE || st->last_core == AMR_WB_CORE ) ) /* HQ init */
135 : {
136 :
137 223 : set_f( hHQ_core->last_ni_gain, 0, BANDS_MAX );
138 223 : set_f( hHQ_core->last_env, 0, BANDS_MAX );
139 223 : hHQ_core->last_max_pos_pulse = 0;
140 :
141 223 : hHQ_core->mode_count = 0;
142 223 : hHQ_core->mode_count1 = 0;
143 :
144 223 : set_s( hHQ_core->prev_SWB_peak_pos, 0, SPT_SHORTEN_SBNUM );
145 223 : hHQ_core->prev_frm_hfe2 = 0;
146 223 : hHQ_core->prev_stab_hfe2 = 0;
147 :
148 223 : if ( st->hTcxEnc != NULL )
149 : {
150 223 : set_f( st->hTcxEnc->old_out, 0, L_FRAME32k );
151 : }
152 : }
153 :
154 : /* Here we only handle cases where last_ppp and last_nelp not updated when coming from CodecB or other cores
155 : within ACELP_CORE if switching from another bitarate to vbr, last_ppp and last_nelp is always updated in the previous frame */
156 1131664 : if ( st->core == ACELP_CORE && ( st->last_core != ACELP_CORE || st->last_codec_mode == MODE2 ) )
157 : {
158 : /* reset in case of bitrate switching in EVS */
159 7636 : if ( st->hSC_VBR != NULL )
160 : {
161 32 : st->hSC_VBR->last_last_ppp_mode = 0;
162 32 : st->hSC_VBR->last_ppp_mode = 0;
163 32 : st->hSC_VBR->last_nelp_mode = 0;
164 : }
165 : }
166 :
167 : /* Handle state reset of stat_noise_uv_mod memory */
168 1131664 : if ( st->core == ACELP_CORE && ( st->last_core != ACELP_CORE || st->last_codec_mode == MODE2 || st->last_total_brate <= PPP_NELP_2k80 ) )
169 : {
170 14969 : st->act_count = 3;
171 14969 : st->uv_count = 0;
172 : }
173 :
174 1131664 : if ( ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && st->last_core == HQ_CORE ) /* EVS and HQ -> ACELP */ ||
175 1131406 : ( ( st->element_mode == IVAS_CPE_DFT || st->element_mode == IVAS_CPE_TD || ( st->element_mode == IVAS_CPE_MDCT && last_element_mode == IVAS_CPE_DFT ) ) && active_cnt == 1 ) ||
176 1131010 : ( st->core == ACELP_CORE && st->last_L_frame > L_FRAME16k ) /* TCX @ 25.6/32 kHz -> ACELP */ )
177 : {
178 : /* Reset the ACELP core in case of HQ->ACELP core switching */
179 :
180 1637 : if ( st->L_frame == L_FRAME16k )
181 : {
182 784 : mvr2r( TRWB2_Ave, st->lsf_old, M ); /* init of LSP */
183 784 : lsf2lsp( st->lsf_old, st->lsp_old, M, INT_FS_16k );
184 : }
185 : else
186 : {
187 853 : mvr2r( TRWB_Ave, st->lsf_old, M ); /* init of LSP */
188 853 : lsf2lsp( st->lsf_old, st->lsp_old, M, INT_FS_12k8 );
189 : }
190 :
191 : /* Reset ACELP parameters */
192 1637 : if ( hLPDmem != NULL )
193 : {
194 1359 : hLPDmem->syn[M] = 0;
195 1359 : set_f( hLPDmem->mem_syn2, 0.0f, M );
196 1359 : set_f( hLPDmem->mem_syn, 0.0f, M );
197 1359 : set_f( hLPDmem->mem_syn1, 0.0f, M );
198 1359 : hLPDmem->mem_w0 = 0.0f;
199 1359 : hLPDmem->tilt_code = 0.0f;
200 1359 : hLPDmem->gc_threshold = 0.0f;
201 1359 : set_f( hLPDmem->dispMem, 0, 8 );
202 : }
203 1637 : st->Nb_ACELP_frames = 0;
204 :
205 1637 : set_zero( st->mem_MA, M );
206 1637 : mvr2r( GEWB_Ave, st->mem_AR, M );
207 1637 : init_gp_clip( st->clip_var );
208 :
209 1637 : st->last_coder_type = GENERIC;
210 :
211 1637 : mvr2r( st->old_pitch_buf + st->L_frame / L_SUBFR, st->old_pitch_buf, st->L_frame / L_SUBFR );
212 1637 : set_f( st->old_pitch_buf + st->L_frame / L_SUBFR, L_SUBFR, st->L_frame / L_SUBFR );
213 :
214 : /* Reset old ACELP buffers */
215 1637 : if ( st->element_mode == EVS_MONO && hLPDmem != NULL )
216 : {
217 32 : set_f( hLPDmem->old_exc, 0, L_EXC_MEM );
218 : }
219 :
220 1637 : if ( st->hBWE_TD != NULL )
221 : {
222 1359 : set_f( st->hBWE_TD->old_bwe_exc, 0, PIT16k_MAX * 2 );
223 :
224 : /* reset BWE memories */
225 1359 : st->hBWE_TD->bwe_non_lin_prev_scale = 0.0;
226 : }
227 :
228 1637 : if ( st->hBWE_FD != NULL )
229 : {
230 1359 : set_f( st->hBWE_FD->old_syn_12k8_16k, 0, NS2SA( 16000, DELAY_FD_BWE_ENC_NS ) );
231 : }
232 : }
233 :
234 1131664 : if ( ( st->core == ACELP_CORE || st->core == AMR_WB_CORE ) && ( st->last_core == TCX_20_CORE || st->last_core == TCX_10_CORE ) )
235 : {
236 : /* Reset the ACELP core in case of TCX->ACELP core switching */
237 7378 : st->Nb_ACELP_frames = 0;
238 :
239 7378 : if ( hLPDmem != NULL )
240 : {
241 7040 : hLPDmem->mem_w0 = 0.0f;
242 7040 : hLPDmem->tilt_code = 0.0f;
243 7040 : init_gp_clip( st->clip_var );
244 7040 : hLPDmem->gc_threshold = 0.0f;
245 7040 : set_f( hLPDmem->dispMem, 0, 8 );
246 : }
247 :
248 7378 : st->last_coder_type = GENERIC;
249 :
250 7378 : mvr2r( st->old_pitch_buf + st->L_frame / L_SUBFR, st->old_pitch_buf, st->L_frame / L_SUBFR );
251 7378 : set_f( st->old_pitch_buf + st->L_frame / L_SUBFR, L_SUBFR, st->L_frame / L_SUBFR );
252 :
253 : /* Reset old TD BWE buffers */
254 7378 : if ( st->hBWE_TD != NULL )
255 : {
256 7040 : set_f( st->hBWE_TD->old_bwe_exc, 0, PIT16k_MAX * 2 );
257 7040 : st->hBWE_TD->bwe_non_lin_prev_scale = 0.0;
258 : }
259 :
260 : /* reset BWE memories */
261 7378 : if ( st->hBWE_TD != NULL )
262 : {
263 7040 : set_f( st->hBWE_FD->old_syn_12k8_16k, 0, NS2SA( 16000, DELAY_FD_BWE_ENC_NS ) );
264 : }
265 : }
266 :
267 1131664 : if ( st->input_Fs >= 16000 && st->last_extl != WB_BWE && st->extl == WB_BWE && st->hBWE_FD != NULL )
268 : {
269 487 : if ( st->last_extl != SWB_BWE && st->last_extl != FB_BWE )
270 : {
271 486 : st->hBWE_FD->prev_mode = NORMAL;
272 486 : st->hBWE_FD->modeCount = 0;
273 : }
274 :
275 487 : st->hBWE_FD->prev_L_swb_norm1 = 8;
276 : }
277 :
278 1131664 : if ( ( st->input_Fs >= 32000 && st->last_extl != SWB_BWE && st->extl == SWB_BWE ) ||
279 1129853 : ( st->input_Fs >= 48000 && st->last_extl != FB_BWE && st->extl == FB_BWE ) )
280 : {
281 : /* we are switching to SWB BWE - reset SWB BWE buffers */
282 2070 : if ( st->L_frame == L_FRAME )
283 : {
284 1734 : Sample_Delay_HP = NS2SA( 16000, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_12k8_NS + DELAY_FIR_RESAMPL_NS - DELAY_CLDFB_NS );
285 1734 : Sample_Delay_LP = NS2SA( 12800, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_12k8_NS );
286 :
287 1734 : if ( st->element_mode > EVS_MONO )
288 : {
289 1732 : if ( st->element_mode == IVAS_CPE_TD )
290 : {
291 5 : Sample_Delay_HP = NS2SA( 16000, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_12k8_NS + DELAY_FIR_RESAMPL_NS - DELAY_CLDFB_NS - L_MEM_RECALC_TBE_NS );
292 : }
293 1732 : Sample_Delay_HP -= NS2SA( 16000, DELAY_FIR_RESAMPL_NS );
294 : }
295 :
296 1734 : mvr2r( old_inp_12k8 + L_INP_MEM + L_FRAME - Sample_Delay_LP, st->hBWE_FD->old_input_lp, Sample_Delay_LP );
297 : }
298 : else
299 : {
300 336 : Sample_Delay_HP = NS2SA( 16000, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_16k_NS + DELAY_FIR_RESAMPL_NS - DELAY_CLDFB_NS );
301 336 : Sample_Delay_LP = NS2SA( 16000, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_16k_NS );
302 :
303 336 : if ( st->element_mode > EVS_MONO )
304 : {
305 336 : if ( st->element_mode == IVAS_CPE_TD )
306 : {
307 0 : Sample_Delay_HP = NS2SA( 16000, ACELP_LOOK_NS + DELAY_FD_BWE_ENC_16k_NS + DELAY_FIR_RESAMPL_NS - DELAY_CLDFB_NS - L_MEM_RECALC_TBE_NS );
308 : }
309 336 : Sample_Delay_HP -= NS2SA( 16000, DELAY_FIR_RESAMPL_NS );
310 : }
311 :
312 336 : mvr2r( old_inp_16k + L_INP_MEM + L_FRAME - Sample_Delay_LP, st->hBWE_FD->old_input_lp, Sample_Delay_LP );
313 : }
314 :
315 2070 : mvr2r( st->hBWE_TD->old_speech_shb + L_LOOK_16k + L_SUBFR16k - Sample_Delay_HP, st->hBWE_FD->new_input_hp, Sample_Delay_HP );
316 :
317 2070 : if ( st->last_extl != WB_BWE )
318 : {
319 2067 : st->hBWE_FD->prev_mode = NORMAL;
320 2067 : st->hBWE_FD->modeCount = 0;
321 : }
322 2070 : st->hBWE_FD->EnergyLF = 0.0f;
323 2070 : st->hBWE_FD->prev_L_swb_norm1 = 8;
324 : }
325 :
326 : /*---------------------------------------------------------------------*
327 : * band-width switching from WB -> SWB/FB
328 : *---------------------------------------------------------------------*/
329 :
330 1131664 : if ( st->element_mode > EVS_MONO )
331 : {
332 1129814 : if ( st->bwidth_sw_cnt == 0 )
333 : {
334 1125813 : if ( st->bwidth >= SWB && st->last_bwidth == WB )
335 : {
336 1007 : st->bwidth_sw_cnt++;
337 : }
338 : }
339 : else
340 : {
341 4001 : st->bwidth_sw_cnt++;
342 :
343 4001 : if ( st->bwidth_sw_cnt == BWS_TRAN_PERIOD )
344 : {
345 996 : st->bwidth_sw_cnt = 0;
346 : }
347 : }
348 : }
349 :
350 1131664 : return;
351 : }
352 :
353 :
354 : /*---------------------------------------------------------------------*
355 : * core_switching_post_enc()
356 : *
357 : * Postprocessing for ACELP/HQ core switching
358 : *---------------------------------------------------------------------*/
359 :
360 1131664 : void core_switching_post_enc(
361 : Encoder_State *st, /* i/o: encoder state structure */
362 : const float *old_inp_12k8, /* i : old input signal @12.8kHz */
363 : const float *old_inp_16k, /* i : old input signal @16kHz */
364 : const float A[] /* i : unquant. LP filter coefs. */
365 : )
366 : {
367 1131664 : if ( st->core == HQ_CORE )
368 : {
369 8457 : st->use_acelp_preq = 0;
370 :
371 8457 : if ( ( st->last_core == ACELP_CORE || st->last_core == AMR_WB_CORE ) && st->element_mode == EVS_MONO ) /* core switching ==> ACELP subframe encoding */
372 : {
373 25 : acelp_core_switch_enc( st, old_inp_12k8 + L_INP_MEM - NS2SA( INT_FS_12k8, ACELP_LOOK_NS ), old_inp_16k + L_INP_MEM - NS2SA( INT_FS_16k, ACELP_LOOK_NS ), A );
374 : }
375 :
376 8457 : st->hBWE_TD->bwe_non_lin_prev_scale = 0.0;
377 8457 : st->hBWE_FD->mem_deemph_old_syn = 0.0f;
378 : }
379 : else
380 : {
381 1123207 : if ( st->hBWE_TD == NULL )
382 : {
383 714896 : return;
384 : }
385 :
386 : /* reset SWB TBE buffers */
387 408311 : if ( st->extl == WB_TBE && st->last_extl != WB_TBE )
388 : {
389 277 : wb_tbe_extras_reset( st->hBWE_TD->mem_genSHBexc_filt_down_wb2, st->hBWE_TD->mem_genSHBexc_filt_down_wb3 );
390 :
391 277 : if ( st->last_extl != WB_BWE )
392 : {
393 193 : set_f( st->hBWE_TD->decim_state1, 0.0f, ( 2 * ALLPASSSECTIONS_STEEP + 1 ) );
394 193 : set_f( st->hBWE_TD->decim_state2, 0.0f, ( 2 * ALLPASSSECTIONS_STEEP + 1 ) );
395 : }
396 :
397 277 : set_f( st->hBWE_TD->state_syn_shbexc, 0, L_SHB_LAHEAD / 4 );
398 277 : set_f( st->hBWE_TD->syn_overlap, 0, L_SHB_LAHEAD );
399 277 : set_f( st->hBWE_TD->mem_csfilt, 0, 2 );
400 : }
401 :
402 408311 : if ( ( st->extl == SWB_TBE || st->extl == FB_TBE ) &&
403 116393 : ( st->last_core == HQ_CORE || st->L_frame != st->last_L_frame || ( st->last_extl != SWB_TBE && st->last_extl != FB_TBE && st->last_core != TCX_20_CORE && st->last_core != TCX_10_CORE ) ) )
404 : {
405 3256 : set_f( st->hBWE_TD->state_ana_filt_shb, 0.0f, ( 2 * ALLPASSSECTIONS_STEEP + 1 ) );
406 3256 : InitSWBencBufferStates( st->hBWE_TD, NULL );
407 3256 : swb_tbe_reset( st->hBWE_TD->mem_csfilt, st->hBWE_TD->mem_genSHBexc_filt_down_shb, st->hBWE_TD->state_lpc_syn, st->hBWE_TD->syn_overlap, st->hBWE_TD->state_syn_shbexc, &( st->hBWE_TD->tbe_demph ), &( st->hBWE_TD->tbe_premph ), st->hBWE_TD->mem_stp_swb, &( st->hBWE_TD->gain_prec_swb ) );
408 3256 : set_f( st->hBWE_TD->dec_2_over_3_mem, 0.0f, L_FILT_2OVER3 );
409 3256 : set_f( st->hBWE_TD->dec_2_over_3_mem_lp, 0.0f, L_FILT_2OVER3_LP );
410 : }
411 405055 : else if ( ( st->extl == SWB_TBE || st->extl == FB_TBE ) && ( ( st->element_mode == IVAS_CPE_TD && st->last_extl != SWB_TBE && st->last_extl != FB_TBE ) || ( st->element_mode != IVAS_CPE_TD && st->last_total_brate != st->total_brate ) || ( st->last_bwidth != st->bwidth ) || ( st->last_codec_mode != MODE1 ) || ( st->rf_mode_last != st->rf_mode ) ) )
412 : {
413 92658 : set_f( st->hBWE_TD->state_lpc_syn, 0.0f, LPC_SHB_ORDER );
414 92658 : set_f( st->hBWE_TD->state_syn_shbexc, 0.0f, L_SHB_LAHEAD );
415 92658 : set_f( st->hBWE_TD->mem_stp_swb, 0.0f, LPC_SHB_ORDER );
416 92658 : set_f( st->hBWE_TD->mem_zero_swb, 0, LPC_SHB_ORDER );
417 92658 : st->hBWE_TD->gain_prec_swb = 1.0f;
418 : }
419 312397 : else if ( st->last_core == TCX_20_CORE || st->last_core == TCX_10_CORE )
420 : {
421 229782 : TBEreset_enc( st->hBWE_TD, st->last_core, st->bwidth );
422 : }
423 :
424 : /* Interp_3_2 CNG buffers reset */
425 408311 : if ( st->extl == FB_TBE && ( ( st->last_extl != FB_TBE && st->last_core != TCX_20_CORE && st->last_core != TCX_10_CORE ) || st->L_frame != st->last_L_frame ) )
426 : {
427 1009 : set_f( st->hBWE_TD->fb_state_lpc_syn, 0, LPC_SHB_ORDER );
428 1009 : st->hBWE_TD->fb_tbe_demph = 0;
429 1009 : fb_tbe_reset_enc( st->hBWE_TD->elliptic_bpf_2_48k_mem, &st->hBWE_TD->prev_fb_energy );
430 : }
431 : /* Fade towards init value for non HQ_CORE */
432 408311 : if ( st->hHQ_core != NULL )
433 : {
434 404646 : st->hHQ_core->crest_lp = HQ_CREST_FAC_SM * ( st->hHQ_core->crest_lp ) + ( 1.0f - HQ_CREST_FAC_SM ) * HQ_CREST_THRESHOLD;
435 404646 : st->hHQ_core->crest_mod_lp = HQ_CREST_FAC_SM * ( st->hHQ_core->crest_mod_lp ) + ( 1.0f - HQ_CREST_FAC_SM ) * HQ_CREST_MOD_THRESHOLD;
436 : }
437 : }
438 :
439 416768 : return;
440 : }
441 :
442 :
443 : /*---------------------------------------------------------------------*
444 : * core_switching_hq_prepare_enc()
445 : *
446 : * Preprocessing in the first HQ frame after ACELP frame
447 : * - modify bit allocation for HQ core removing CELP subframe budget
448 : * - update st->old_wtda to modify windows at the encoder
449 : *---------------------------------------------------------------------*/
450 :
451 25 : void core_switching_hq_prepare_enc(
452 : Encoder_State *st, /* i/o: encoder state structure */
453 : int16_t *num_bits, /* i/o: bit budget update */
454 : const int16_t input_frame, /* i : frame length */
455 : float *wtda_audio,
456 : const float *audio )
457 : {
458 : int16_t delta, Loverlapp, i;
459 : int16_t n;
460 : int32_t cbrate;
461 :
462 : /* set multiplication factor according to the sampling rate */
463 25 : delta = 1;
464 25 : if ( input_frame == L_FRAME16k )
465 : {
466 0 : delta = 2;
467 : }
468 25 : else if ( input_frame == L_FRAME32k )
469 : {
470 5 : delta = 4;
471 : }
472 20 : else if ( input_frame == L_FRAME48k )
473 : {
474 20 : delta = 6;
475 : }
476 :
477 : /* set switching frame bitrate */
478 25 : if ( st->last_L_frame == L_FRAME )
479 : {
480 5 : if ( st->core_brate > ACELP_24k40 )
481 : {
482 0 : cbrate = ACELP_24k40;
483 : }
484 : else
485 : {
486 5 : cbrate = st->core_brate;
487 : }
488 :
489 : /* subtract ACELP switching frame bits */
490 5 : if ( st->core_brate >= ACELP_11k60 )
491 : {
492 : /* subtract one bit for LP filtering flag */
493 5 : ( *num_bits )--;
494 : }
495 :
496 5 : *num_bits -= ACB_bits_tbl[BIT_ALLOC_IDX( cbrate, GENERIC, 0, 0 )]; /* pitch bits */
497 5 : *num_bits -= gain_bits_tbl[BIT_ALLOC_IDX( cbrate, TRANSITION, 0, 0 )]; /* gain bits */
498 5 : *num_bits -= FCB_bits_tbl[BIT_ALLOC_IDX( cbrate, GENERIC, 0, 0 )]; /* FCB bits */
499 : }
500 : else /* L_frame == L_FRAME16k */
501 : {
502 20 : if ( st->core_brate <= ACELP_8k00 )
503 : {
504 0 : cbrate = ACELP_8k00;
505 : }
506 20 : else if ( st->core_brate <= ACELP_14k80 )
507 : {
508 0 : cbrate = ACELP_14k80;
509 : }
510 : else
511 : {
512 20 : cbrate = min( st->core_brate, ACELP_22k60 );
513 : }
514 :
515 : /* subtract ACELP switching frame bits */
516 20 : if ( st->core_brate >= ACELP_11k60 )
517 : {
518 : /* subtract one bit for LP filtering flag */
519 20 : ( *num_bits )--;
520 : }
521 :
522 20 : *num_bits -= ACB_bits_16kHz_tbl[BIT_ALLOC_IDX_16KHZ( cbrate, GENERIC, 0, 0 )]; /* pitch bits */
523 20 : *num_bits -= gain_bits_16kHz_tbl[BIT_ALLOC_IDX_16KHZ( cbrate, GENERIC, 0, 0 )]; /* gain bits */
524 20 : *num_bits -= FCB_bits_16kHz_tbl[BIT_ALLOC_IDX_16KHZ( cbrate, GENERIC, 0, 0 )]; /* FCB bits */
525 : }
526 :
527 : /* subtract BWE bits */
528 25 : if ( !( ( inner_frame_tbl[st->bwidth] == L_FRAME16k && st->last_L_frame == L_FRAME16k ) || inner_frame_tbl[st->bwidth] == L_FRAME8k ) )
529 : {
530 25 : *num_bits -= ( NOOFGAINBITS1 + AUDIODELAYBITS );
531 : }
532 :
533 25 : n = (int16_t) ( (float) input_frame * N_ZERO_MDCT_NS / FRAME_SIZE_NS );
534 :
535 : /* Transition window at the encoder */
536 25 : Loverlapp = delta * SWITCH_OVERLAP_8k;
537 6325 : for ( i = 0; i < n; i++ )
538 : {
539 6300 : wtda_audio[i + input_frame / 2] = -audio[n - i - 1];
540 : }
541 :
542 2825 : for ( i = n; i < input_frame / 2 - Loverlapp; i++ )
543 : {
544 2800 : wtda_audio[i + input_frame / 2] = -audio[n - i - 1];
545 : }
546 :
547 2125 : for ( i = input_frame / 2 - Loverlapp; i < input_frame / 2; i++ )
548 : {
549 2100 : wtda_audio[i + input_frame / 2] = -audio[n - i - 1] * (float) cos( ( i + 1 - input_frame / 2 + Loverlapp ) * EVS_PI / ( 2 * ( Loverlapp + 1 ) ) ); /* win=cos() */
550 : }
551 :
552 : /* reset state of old_out if switching */
553 25 : if ( st->hTcxEnc != NULL )
554 : {
555 25 : set_f( st->hTcxEnc->old_out, 0.0f, L_FRAME32k );
556 : }
557 :
558 25 : return;
559 : }
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